Labeled as the fourth passive element, memristor or memory resistor, is seen as a promising future memory technology to compete against the entrenched Flash and traditional DRAM memory technologies. However, progress has been slow due to lack of understanding of the physical processes occurring at the nanoscale structures.
A joint paper by researchers from Hewlett-Packard Labs and the University of California in Santa Barbara, published in Nanotechnology journal, discloses new advances and better understanding of the miniscule structures of memristor. Thus, bringing it closer to reality, according to the researchers.
Combining X-ray scanning technology with advanced modeling and simulation, researchers have been able to better correlate memristor’s electrical characteristics with local atomic structure, chemistry and temperature. As a result, the researchers have been able to understand how heat builds up at the nanoscale level as current passes through this structure. In reality, the scientists discovered that the current in the device flows in a 100-nm channel within the device. And the passage of this current creates heat that changes the titanium dioxide structure, which is surrounding the conducting channel, from a conducting to a non-conducting state.
Speaking to BBC News’ science & technology reporter Jason Palmer, HP Labs lead scientist and memristor discoverer Stanley Williams said that with understanding of the nm-scale structures of memristor and knowing precisely where heat is deposited will help to further advance future engineering efforts. He compared his work to that of Thomas Edison, who took over 1,000 attempts before arriving at a working light bulb, wrote Palmer.
"Without this key information about memristors, we are in Edison mode, where we just guess and modify the device at random," Williams told Palmer.
In commenting on the new advances in memristor technology, Williams added, "With the information that we gained from the present study, we now know that we can design memristors that can be used for multi-level storage - that is, instead of just storing one bit in one device, we may be able to store as many as four bits."
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